On Sun, 5 May 2097, PredatorZeta wrote:
Peter Gerwinski peter@agnes.dida.physik.uni-essen.de wrote:
Or else: Loading the memory reference into a register and pushing that *might* be faster than a direct push (don't know).
Just little clarifying.....:)) No. Surely not on 80x86 machines. Look this (is for Pentium):
1 push (mem) take 2 cycles NOT pairable
2 a) mov (mem), reg take 1 cycle pairable AGI Stall (1 cycle+cut off pairing system) b) push reg take 1 cycle pairable
TOTAL: 3 cyclesWell, is 2 (not pairable) versus 2 1/2 (not pairable) cycles..... However, with a manual re-ordering it could take only 1 cycle...8-))
The GCC 2.7.2.x backend used by GPC knows nothing about pentium optimzations or instruction scheduling. However, I happen to have a Cygnus-CDK based GPC around that _does_ know pentium optimizations and it still produces the same assembly. So, I guess more work is needed here (by the GCC crew), although this compiler produces significantly faster code already :-)
JanJaap
--- With sufficient thrust, pigs fly just fine. However, this is not necessarily a good idea. It is hard to be sure where they are going to land, and it could be dangerous sitting under them as they fly overhead. -- RFC1925.